The present invention relates to a switching power source device, a switching power source control circuit, and a switching power source device control method, including a series resonant circuit which has a current resonant inductor and a current resonant capacitor, and in particular relates to a switching power source device, a switching power source control circuit, and a switching power source device control method which eliminate a reverse flow of a current at a time of a light load.
As an existing switching power source device, one which includes the kind of current resonant type converter is known (FIG. 5). In the current resonant type converter, an input direct voltage Vi is applied to a series resonant circuit which includes a resonant inductor Lr and a resonant capacitor Cr. By turning on and off two main switch elements Qa, Qb configured of metal-oxide-semiconductor field-effect transistors (MOSFET), or the like, and controlling a path of a primary side current flowing in a first coil L1 of a power converting transformer T, a current with a sinusoidal waveform flows in the first coil L1 of the transformer T. Also, rectification diodes D1, D2, which rectify induced secondary currents I1, I2 respectively, and an output capacitor C0, which smoothes an output voltage V0 to a load LD, are connected to a second coil L2 and a third coil L3 of the transformer T (a coil ratio of L1:L2:L3 is taken to be n:1:1). Furthermore, the output voltage V0 to the load LD is returned to a drive circuit 3 of the main switch elements Qa, Qb via an error amplifier 1 and a voltage control oscillation circuit (VCO) 2, controlling a current and voltage flowing in the first coil L1 of the transformer T, and controlling the output voltage V0 at a constant voltage. The VCO 2 functions so that, when determining that due to an output of the error amplifier 1, the output voltage V0 is higher than a set voltage, or is a light load, it increases an output frequency thereof, while when determining that the output voltage V0 is lower than the set voltage, or is a heavy load, it reduces the output frequency thereof.
However, when using this kind of switching power source device as a low voltage with high current power source, when the secondary currents I1, I2 flow into the rectification diodes D1, D2 provided on the secondary side of the transformer T, due to a forward drop voltage VF of the rectification diodes D1, D2, a large power loss VF×I0 occurs. I0 is either one of the secondary currents I1, I2. Therefore, as shown in FIG. 6, a separately excited drive type of current resonant circuit is used in which MOSFETs Qs1, Qs2, each of which has low on resistance, are connected as synchronous rectification switch elements in place of the rectification diodes D1, D2, a synchronous rectification is carried out, and the power loss is reduced. The MOSFETs Qs1, Qs2 shown in FIG. 6 is individually on-off controlled by the drive circuit 3 in synchronization with an operation frequency fop for turning on and off the primary side main switch elements Qa, Qb, so that the secondary currents I1, I2 are alternately accumulated in the capacitor C0.
Since this kind of switching power source device is configured in such a way as to cause a switching operation of the main switch elements Qa, Qb, and obtain an optional direct current output via the voltage converting transformer T. Therefore, a charge accumulated in the capacitor C0 is discharged, a current flowing back to the transformer T side (a reverse current) occurs, and a power loss in a reverse flow area becomes a problem depending on a size of the load LD connected to the secondary side, and the like.
FIG. 7 is a circuit diagram illustrating one example of a secondary side diode rectification current resonant type converter. In FIG. 7, the transformer T of the current resonant type converter of FIG. 5 is divided into an exciting inductance element Lm and an ideal transformer Ti, and an operating principle thereof is clearly illustrated. Herein, prior to a description of the power loss in the reverse flow area, a description will be given of the operating principle of the current resonant type converter.
With the kind of current resonant type converter shown in FIG. 7, it is possible to define the following two kinds of basic current resonant frequency. Herein, Lr, Lm, and Cr indicate an inductance of the resonant inductor Lr, the exciting inductance element of the transformer T, and a capacitance of the resonant capacitor Cr, respectively.
                    Expression        ⁢                                  ⁢        1                                                                      fr          ⁢                                          ⁢          1                =                  1                      2            ⁢                                                  ⁢            π            ⁢                                          Lr                ·                Cr                                                                        (        1        )                                Expression        ⁢                                  ⁢        2                                                                      fr          ⁢                                          ⁢          2                =                  1                      2            ⁢                                                  ⁢            π            ⁢                                                            (                                      Lr                    +                    Lm                                    )                                ·                Cr                                                                        (        2        )            
With the switching power source device of FIGS. 5 and 7, when there is a supply of power to the load LD, the voltage of the exciting inductance element Lm of the transformer T is clamped at n×(V0+VF) in accordance with the output voltage V0, the exciting inductance element Lm is not involved in the current resonance, and power is supplied to the secondary side circuit by operating at a first resonant frequency fr1 (refer to Expression 1 above) decided by the resonant capacitor Cr and resonant inductor Lr. In this case, a sum of a current Im and a resonant current Ir flowing in the exciting inductance element Lm flows as a charge-discharge current to the resonant capacitor Cr. At this time, the operation frequency fop of the main switch elements Qa, Qb is controlled by the VCO 2 so as to stabilize the output voltage V0.
A second resonant frequency fr2 is a resonant frequency when no supply of power is carried out to the load LD connected to the secondary side of the transformer T. Since the ideal transformer Ti does not function as a transformer, and the voltage of the exciting inductance element Lm of the transformer T is not clamped, a resonance operation is carried out mainly by the capacitance Cr of the resonant capacitor Cr, the resonant inductance Lr of the resonant inductor Lr, and the exciting inductance element Lm.
Regarding a specific resonance operation of the current resonant type converter of FIG. 7, it is possible to divide into six operational modes (Modes 1 to 6), as shown in FIG. 8, depending on a relationship between its operation frequency fop and the first resonance frequency fr1 (hereafter called simply the resonance frequency), and on the size of the load LD connected to the secondary side of the transformer T.
That is, in FIG. 8, Modes 1 to 3 are cases in which the operation frequency fop is lower than the resonance frequency fr1, while Modes 4 to 6 are cases in which the operation frequency fop is equal to or higher than the resonance frequency fr1. Also, a heavy load (HL) condition is such that the size of the connected load LD is 50% or more of a rated load (maximum load) of the switching power source device, a light load (LL) condition is such that the size is 20% to 50%, and a very light load (VLL) condition is such that the size is 20% or less.
Firstly, a description will be given for the operational modes of the current resonant type converter of FIG. 5 by using the operation waveforms shown in FIG. 9.
FIG. 9 shows an operation waveform of the first operational mode (Mode 1), in which the operation frequency fop (one cycle of the switching operation is taken to be “Top”) is lower than the resonance frequently fr1 (the resonance frequency at that time is taken to be “Tr”), and the load LD is in the heavy load condition. Herein, a description will be given for one operation frequency Top which is divided into ten operational conditions (timings s1 to s10), in order from the timing s1 (hereafter, the term “timing sj” (j=1 to 16) indicates a time period, rather than an instant) immediately after one main switch element Qa is turned on.
In FIG. 9, (A) and (B) are gate voltages Vga, and Vgb of the main switch elements Qa, and Qb, which are outputs of the drive circuit 3. C and D are currents Ia and Ib which flow in the main switch elements Qa, Qb. E is an inter-terminal voltage Vc of the resonant capacitor Cr, and F and G are currents I1 and I2 which flow in the rectification diodes D1 and D2.
FIG. 10 is a circuit diagram illustrating the operational condition in the timing s1 of the first operational mode. Herein, a state immediately after the main switch element Qa is turned on is shown. An operational result of the preceding timing s10 is taken over, and the current Ia is flowing in the direction shown by the arrow. Also, the other main switch element Qb is off. At this time, the exciting current Im flows in the exciting inductance element Lm, in a direction opposite to that of the resonant current Ir. As it is bigger than the resonant current Ir, it flows as a discharge current in a direction discharging the charge of the resonant capacitor Cr. A current induced in the second coil L2 by the ideal transformer Ti, based on the resonant current Ir of the primary side resonant circuit, is supplied to the load LD from the rectification diode D1.
In the operational condition in the timing s2 shown in FIG. 11, the main switch element Qa continues to be on, and Qb continues to be off. However, the exciting current Im, which had been flowing in the direction opposite to that of the resonant current Ir, flows in the same direction as the resonant current Ir, and begins to charge the resonant capacitor Cr. Then, in the same way as in the preceding timing s1, the sinusoidal wave current I1 is caused to flow in the secondary side rectification diode D1 (refer to (F) of FIG. 9) by the ideal transformer Ti, based on the resonant current Ir of the primary side resonant circuit, and power is supplied to the load LD.
In the timing s3 shown in FIG. 12, the main switch element Qa continues to be on, and Qb continues to be off. However, a half cycle (Tr/2) of a resonance frequency Tr, determined by the size of the resonant inductor Lr and resonant capacitor Cr, has elapsed, and power has ceased to be supplied to the secondary side from the primary side of the ideal transformer Ti. However, as the operation frequency fop is lower than the resonance frequency fr1, and the main switch element Qa is in the on condition, the primary side resonant circuit resonates at the second resonance frequency fr2, and the resonant capacitor Cr is charged by the exciting current Im. As the cycle of the second resonance frequency fr2 is extremely long in comparison with the cycle of the first resonance frequency fr1, the resonance waveform in the timing s3 is approximately a straight line.
The timing s4 shown in FIG. 13 corresponds to a dead time when the two main switch elements Qa, Qb are both off. Herein, currents Ia, Ib flow, respectively, through a distributed capacity C_Qa of the main switch element Qa in the off condition, and a distributed capacity C_Qb of the other main switch element Qb in the off condition, in the directions shown by the arrows of FIG. 13, changing the voltage between the two ends of the two distributed capacities C_Qa and C_Qb. At this time, the resonant capacitor Cr, and the two distributed capacities C_Qa and C_Qb, form a resonant circuit of the resonant inductance Lr and exciting inductance element Lm, and carry out a resonance operation so as to charge the resonant capacitor Cr. However, no power is supplied to the secondary side from the primary side. As the capacitance of the resonant capacitor Cr is far bigger than the capacitance of the distributed capacities C_Qa, C_Qb, it is also possible, in the timing s4, to view the resonant capacitor Cr as a constant-voltage source.
In the timing s5 shown in FIG. 14, the two main switch elements Qa, Qb continue to be in the off condition, but in the timing s4 the voltage between the two ends of the distributed capacity C_Qb increases. When taking the side of the distributed capacity C_Qb connected to the resonant capacitor Cr in FIG. 13 to be a reference potential, the absolute value increases at a negative voltage. As a result, in the main switch element Qb, a body diode D_Qb thereof attains a conduction state. At this time, by the resonant circuit resonating on the primary side, a current I2 begins to flow from the primary side of the ideal transformer Ti, via the third coil L3, and a supply of power to the load LD begins. That is, as the exciting current Im flowing in the exciting inductance element Lm flows in a direction the reverse of that of the resonant current Ir as a bigger current than the resonant current Ir, the resonant capacitor Cr continues to be charged. As the current Ib is flowing in the body diode D_Qb (the orientation of the current is the direction shown by the arrow), and the other main switch element Qa is off, the terminal of the first coil L1 of the transformer T on the side connected to the resonant capacitor Cr becomes a high voltage side, while the terminal on the opposite side is a low voltage side.
In the timing s6 shown in FIG. 15, the main switch element Qb is in a condition immediately after being turned on, and the current Ib is flowing there, as before, in the direction shown by the arrow. Also, the other main switch element Qa is off. Consequently, the terminal of the first coil L1 of the transformer Ton the side connected to the resonant capacitor Cr becomes the high voltage side (the terminal on the opposite side is the low voltage side), and power induced in the secondary side third coil L3 from the primary side resonant circuit by the ideal transformer Ti is supplied to the load LD from the rectification diode D2. At this time, since the exciting current Im flows in the exciting inductance element Lm in a direction the reverse of that of the resonant current Ir, and is bigger than the resonant current Ir, the resonant capacitor Cr is charged by the current differential (Im-Ir).
In the timing s7 shown in FIG. 16, the main switch element Qa continues to be off, and Qb continues to be in on. However, the exciting current Im becomes smaller than the resonant current Ir, and the exciting current Im, which had been flowing in the direction opposite to that of the resonant current Ir, flows in the same direction as the resonant current Ir (the direction shown by the arrow of FIG. 16), and the charge accumulated in the resonant capacitor Cr begins to be discharged. Then, from the primary side resonant circuit, a sinusoidal wave current is caused to flow in the secondary side rectification diode D2 (refer to (G) of FIG. 9) by the ideal transformer Ti, and power is supplied to the load LD.
In the timing s8 shown in FIG. 17, the main switch element Qa continues to be off, and Qb continues to be on. However, the half cycle resonance operation in the resonant inductor Lr and resonant capacitor Cr has finished, and power has ceased to be supplied to the secondary side from the primary side. Also, while the resonant capacitor Cr continues the discharge, the primary side resonant circuit carries out a resonance operation at the second resonance frequency fr2.
The timing s9 shown in FIG. 18 corresponds to a dead time when the two main switch elements Qa, Qb are both off. Herein, the currents Ia, Ib flow, respectively, through the distributed capacity C_Qa of the main switch element Qa, and the distributed capacity C_Qb of the other main switch element Qb, in the directions shown by the arrows of FIG. 18, changing the voltage between the two ends of the two distributed capacities C_Qa and C_Qb. At this time, the resonant capacitor Cr, and the two distributed capacities C_Qa, C_Qb configure a resonant circuit of the resonant inductance Lr and exciting inductance element Lm, and carry out a resonance operation so as to discharge the resonant capacitor Cr. However, no power is supplied to the secondary side from the primary side. As the capacitance of the resonant capacitor Cr is far bigger than the capacitance of the distributed capacities C_Qa, C_Qb, it is also possible, in the timing s9, to view the resonant capacitor Cr as a constant-voltage source.
In the timing s10 shown in FIG. 19, the two main switch elements Qa, Qb continue to be in the off condition, but as a result of the voltage between the two ends of the distributed capacity C_Qa increasing in the timing s9, in the main switch element Qa, a body diode D_Qa thereof attains a conduction state. At this time, by the resonant circuit resonating on the primary side, a current I1 begins to flow from the primary side of the ideal transformer Ti, via the second coil L2, and a supply of power to the load LD begins. Also, the exciting current Im flowing in the exciting inductance element Lm flows in a direction opposite to that of the resonant current Ir as a bigger current than the resonant current Ir, and the resonant capacitor Cr is further discharged.
FIG. 20 is an operation waveform diagram illustrating a current and voltage waveform of each portion in the second operational mode of the current resonant type converter. Herein, a description will be given of the second operational mode (Mode 2), in which the operation frequency fop is lower than the resonance frequency fr1, and the load LD is in the light load condition.
As shown in (A) and (B) of FIG. 20, a predetermined dead time is provided in the gate voltages Vga, Vgb of the main switch elements Qa, Qb. Also, as the load LD is in the light load condition, the currents Ia, Ib flowing in the main switch elements Qa, Qb decrease, and a fluctuation range of the inter-terminal voltage Vc of the resonant capacitor Cr shown in (E) of FIG. 20 also decreases. Also, as the exciting current Im does not change so much from the time of the heavy load, the effect of the exciting current Im becomes relatively large, and there is more phase lead than at the time of the heavy load. Hereafter, a description will be given only of operational conditions differing from the circuit operations at the time of the heavy load shown in FIG. 9.
FIG. 21 shows an operational condition in a timing s11 immediately after the main switch element Qa is turned on. This condition is a condition in which the main switch element Qa is on, and Qb is off. The resonant capacitor Cr forms a resonant circuit of the resonant inductance Lr and exciting inductance element Lm but, unlike in the timing s1 (refer to FIG. 10) in Mode 1 shown in FIG. 9. Since the voltage between the two ends of the exciting inductance element Lm (the + side of FIG. 21 is a high potential side) is low, power cannot immediately be supplied from the primary side to the secondary side, even though the main switch element Qa is turned on.
Subsequently, the resonant capacitor Cr discharges, and its inter-terminal voltage Vc decreases. Upon satisfying an Expression 3, at the end of the timing s11, the resonance operation in the primary side resonant circuit in the timing s1 begins, and power is supplied from the primary side to the secondary side. Herein, Vf is a forward voltage of the secondary side rectification diodes D1, D2.(Vi−Vc)*Lm/(Lr+Lm)=n*(V0+Vf)  (3)
FIG. 22 illustrates an operational condition of a dead time timing s12, in which a half cycle (Top/2) of the switching operation has elapsed, and the two main switch elements Qa, Qb are both turned off. In this case, the body diode D_Qb of the main switch element Qb is conductive and, continuing from the preceding timing s4, the exciting current Im (to be precise, this is the resonant current of the resonant circuit configured of the resonant capacitor Cr, resonant inductor Lr, and exciting inductance element Lm) flows into the resonant capacitor Cr. However, as the voltage between the two ends of the exciting inductance element Lm (the + side of FIG. 22 is a high potential side) is insufficient, unlike in the operational condition (timing s5) shown in FIG. 14, it is not possible to supply power to the secondary side.
FIG. 23 illustrates the operational condition of the next timing s13. As shown here, the main switch element Qb is on, and the resonant capacitor Cr configures a resonant circuit of the resonant inductance Lr and exciting inductance element Lm. However, unlike the case of the timing s6 of the first operational mode (Mode 1) shown in FIG. 9, as the voltage between the two ends of the exciting inductance element Lm (the + side of FIG. 23 is a high potential side) is low, power cannot immediately be supplied from the primary side to the secondary side, even when the main switch element Qb is turned on.
Subsequently, the resonant capacitor Cr is charged. When its inter-terminal voltage Vc attains an operational condition (the condition of the timing s6 of FIG. 15) in which it satisfies an Expression 4, power is supplied from the primary side to the secondary side by a resonance operation of the resonant inductance Lr and resonant capacitor Cr.Vc*Lm/(Lr+Lm)=n*(V0+Vf)  (4)
Subsequently, proceeding sequentially from the timing s6 to the timings s7, s8, on arriving at the timing s9 in which the two main switch elements Qa, Qb are both in the off condition, the currents Ia, Ib flow, respectively, through the distributed capacity C_Qa of the main switch element Qa, and the distributed capacity C_Qb of the other main switch element Qb, in the directions shown by the arrows of FIG. 18, changing the voltage between the two ends of the two distributed capacities C_Qa and C_Qb. At this time, the load LD is in the light condition. Therefore, in the timing s14 in which the body diode D_Qa of the main switch element Qa is conductive, as shown in FIG. 24, the voltage between the two ends of the exciting inductance element Lm (the + side of FIG. 24 is a high potential side) is insufficient. Unlike the operational condition (timing s10) shown in FIG. 19, it is not possible to supply power to the secondary side.
Next, a description will be given for the third operational mode (Mode 3), in which the operation frequency fop is lower than the resonance frequency fr1, and the load LD is in an even smaller very light load (VLL) condition. FIG. 25 is an operation waveform diagram illustrating a current and voltage waveform of each portion in the third operational mode of the current resonant type converter. In this case, the resonant current Ir further decreases, and the fluctuation range of the inter-terminal voltage Vc of the resonant capacitor Cr also further decreases. The voltage Vc of the resonant capacitor Cr is controlled by the exciting current Im (or by the resonant current of the resonant circuit configured of the resonant capacitor Cr, resonant inductor Lr, and exciting inductance element Lm), and there is even more phase lead.
In the timing s2, the kind of resonant current Ir and exciting current Im shown in FIG. 11 flow, but the resonant current Ir is far smaller than the exciting current Im, and the inter-terminal voltage Vc of the resonant capacitor Cr is controlled by the exciting current Im. For this reason, the charge and discharge time by the resonant current Ir from the resonant inductor Lr becomes shorter. Consequently, in the third operational mode (Mode 3) in which the load becomes very light, a shift is made to the condition of the timing s3 in a shorter time than in the first operational mode (the heavy load Mode 1) and second operational mode (the light load Mode 2).
In the same way, in the timing s7, the kind of resonant current Ir shown in FIG. 16 is far smaller than the exciting current Im, and the inter-terminal voltage Vc of the resonant capacitor Cr is controlled by the exciting current Im. For this reason, the charge and discharge time by the resonant current Ir from the resonant inductor Lr becomes shorter, and in the operational mode with the very light load (Mode 3), a shift is made to the operational condition of the timing s8 earlier than when there is a heavy load or a light load.
Furthermore, operation waveforms for the fourth to sixth operational modes (Modes 4 to 6), in which the operation frequency fop is higher than, or equal to, the resonance frequency fr1, are shown in FIGS. 26, 29 and 30 respectively.
FIG. 26 is an operation waveform diagram illustrating a current and voltage waveform of each portion in the fourth operational mode of the current resonant type converter. In the fourth operational mode (Mode 4), the operation frequency fop is equal to or higher than the resonance frequency fr1, and the load LD is in a heavy load condition.
FIG. 27 illustrates an operational condition in a timing s15 in FIG. 26, in which the two main switch elements Qa, Qb are turned off simultaneously. In the case of the fourth operational mode (Mode 4), even though the main switch element Qa is turned off in the timing s15, the body diode D_Qb of the main switch element Qb is conductive, and continues a discharge of energy accumulated in the resonant inductor Lr, but the + side potential of the exciting inductance element Lm is maintained. For this reason, the resonant current Ir flows in the ideal transformer Ti, and power is supplied from the primary side to the secondary side. In this case, as a voltage (n×(V0+VF)+Vc+VF) is applied to the resonant inductor Lr, and it takes on a form approximating a constant voltage discharge, the current I1, which decreases approximately linearly, flows in the rectification diode D1. In the next timing s5, the resonant current Ir flows in the reverse direction, and the sinusoidal wave current I2 begins to flow in the secondary side rectification diode D2. Consequently, in the fourth operational mode, the secondary side sinusoidal wave currents I1, I2 flow consecutively.
FIG. 28, in the same way, illustrates an operational condition in a timing s16, in which the two main switch elements Qa, Qb are turned off simultaneously. In this case, even though the main switch element Qb is turned off, the body diode D_Qa of the main switch element Qa is conductive. Also, due to the discharge of the resonant inductor Lr, the + side potential of the exciting inductance element Lm is maintained, and power is supplied to the secondary side.
FIG. 29 is an operation waveform diagram illustrating a current and voltage waveform of each portion in the fifth operational mode of the current resonant type converter. Herein, a description will be given of the fifth operational mode (Mode 5), in which the operation frequency fop is equal to or higher than the resonance frequency fr1, and the load LD is in a light load condition.
In each of the timings s15, s16, immediately after the two main switch elements Qa, Qb are turned off simultaneously, it is possible to supply power to the secondary side. However, as the load LD is in the light load condition, in each of the subsequent timings s11, s12, and s13, s14, in the same way as in the second operational mode (refer to FIG. 20), a condition is such that no power is supplied to the secondary side.
FIG. 30 is an operation waveform diagram illustrating a current and voltage waveform of each portion in the sixth operational mode of the current resonant type converter. In Mode 6, in which the operation frequency fop is equal to or higher than the resonance frequency fr1, and there is a very light load (VLL) condition, during a period in which the two main switch elements Qa, Qb are each turned on, the timings s11, s3, and s13, s8 appear, in which no power is supplied to the secondary side.
Heretofore, a description has been given for the resonance operation in the six operational modes of the current resonant type converter shown in FIG. 7. Further consideration is made on a separately excited drive synchronous rectification in the current resonant type converter of FIG. 6, in which the secondary side rectification diodes D1, D2 are replaced with the MOSFETs Qs1, Qs2, which have low resistances.
As synchronous rectification methods, there are a self excitation drive method and a separate excitation drive method. Regarding the separate excitation drive method, by building a logic circuit into a power source IC in order to emit a drive signal in the logic circuit, it becomes easy for a power source maker to realize a synchronous rectification function. Consequently, all IC manufacturers are devising various separate excitation drive methods (refer to U.S. Pat. No. 7,184,280: Patent Document 1, U.S. Patent Pub. App. No. 2008/0055942: Patent Document 2, U.S. Patent Pub. App. No. 2005/0122753: Patent Document 3, Japanese Unexamined Patent Application Publication No. JP-A-2005-198438: Patent Document 4, and Japanese Unexamined Patent Application Publication No. JP-A-2005-198375: Patent Document 5).
As to the separate excitation drive synchronous rectification, it seems to be sufficient that synchronous drive signals of the MOSFETs Qs1, Qs2 are synchronized with the gate signals which conduct switching controls over the main switch elements Qa, Qb. However, in actual practice, if a reverse flow area is not detected in each operational mode and a conversion is not made to a drive signal synchronized with each one, the charge accumulated in the output capacitor C0 is discharged, and a current flowing back to the transformer T side (a reverse current) occurs, thereby decreasing the efficiency. Furthermore, there emerges a danger of a circuit breakage due to the power flowing back to the primary side.
Herein, the reverse flow area in each operational mode is decided by the relationship between the operation frequency fop and resonance frequency fr1 of the current resonant type converter, and the load LD. Of these, the operation frequency fop changes depending on circuit parameters and the load condition, but the resonance frequency fr1 is determined by the size of the resonant capacitor Cr and resonant inductor Lr. Consequently, although a synchronous rectification which synchronizes the synchronous drive signal with a power switching signal is a simple method, in that case, a countermeasure is needed to eliminate the following five reverse flow areas.
That is, the switching power source device which turns the two main switch elements Qa, Qb on and off using the gate signals Vga, Vgb respectively, and supplies the secondary currents I1, I2, can prevent the secondary currents I1, I2 from flowing back in the first operational mode (Mode 1) shown in FIG. 31, by reliably turning off the synchronous control MOSFETs Qs1, Qs2 in the timings s3, s8 of a latter half of the half cycle (Top/2) of the switching operation shown in FIG. 9. Consequently, in the event that the kind of gate signals Vga, Vgb shown in (A) and (B) in FIG. 31 are output as they are to the synchronous control MOSFETs Qs1, Qs2 as synchronous drive signals Vgs 1, Vgs 2, a reverse flow current flows in an area (Range A) of the timings s3, s8.
Also, in the case of the second operational mode (Mode 2), apart from Range A in which the reverse current occurs, there is also a danger of the reverse current occurring in an area Range B shown in FIG. 32 (corresponding to the timings s11 and s13 shown in FIG. 20).
In the same way, in the case of the third operational mode (Mode 3), as shown in FIG. 33, as well as the reverse current occurring in Range A and Range B, the reverse current also occurs in Range C (this is within a half cycle of a resonance cycle Tr, but corresponds to an area in which the resonance is finished).
In the case of the fourth operational mode (Mode 4) shown in FIG. 34, there is no danger of the reverse current occurring, because the secondary currents I1, I2 are consecutive.
In the fifth operational mode (Mode 5) shown in FIG. 35, the reverse current occurs in an area Range D (corresponding to the timings s11, s13 shown in FIG. 29).
In the case of the sixth operational mode (Mode 6), as shown in FIG. 36, as well as the reverse current occurring in Range D, the reverse current also occurs in an area Range E (corresponding to the timings s3 and s8 shown in FIG. 30). Consequently, in the event of applying signals synchronized with the gate signals Vga, Vgb (the same signals) as the synchronous drive signals Vgs1, Vgs2 to the synchronous control MOSFETs Qs1, Qs2, as the reverse current occurs in each of the operational modes 1 to 3, and 5 and 6, it has been necessary to form individual Vgs 1 and Vgs 2 signal waveforms in the areas (Ranges A to E) corresponding thereto.
Therefore, with the heretofore known switching power source devices, there is provided a constant width pulse (CWP) generation circuit which outputs a CWP signal with a pulse width slightly narrower than an on period of the gate signals Vga, Vgb, forming the waveforms of the synchronous drive signals Vgs 1, Vgs2. That is, when the operation frequency fop is the same as, or higher than, the resonance frequency fr1, the synchronous drive signals Vgs 1, Vgs2 are synchronized with the gate signals Vga, Vgb, and when the operation frequency fop is lower than the resonance frequency fr1, the synchronous drive signals Vgs 1, Vgs2 are synchronized with the constant width pulse signal CWP, causing it to finish (for example, refer to Patent Document 1). Because of this, even in the case of replacing the secondary side rectification diodes D1, D2 with the MOSFETs Qs1, Qs2, which have low on resistance, it is possible to prevent the reverse flow current from the secondary side.
However, with the invention described in Patent Document 1, as a timing of a start-up of the synchronous drive signals Vgs 1, Vgs2 is always synchronized with the gate signals Vga, Vgb, it is difficult to prevent the reverse current immediately before the secondary current begins to flow, as in the reverse current area (Range B) in the second operational mode (Mode 2). Also, in the cases of Modes 4 to 6, in which the operation frequency fop is the same as, or higher than, the resonance frequency fr1, in the event the synchronous drive signals Vgs1, Vgs2 are synchronized with the gate signals Vga, Vgb, it is not possible to prevent the reverse current in the light load (LL) condition or very light load (VLL) condition.
As a different switching power supply device, a method for comprising the kind of synchronous rectification MOSFET control circuit shown in FIG. 37(A) is known (for example, Patent Document 2). Also, an operation waveform of each portion thereof is shown in FIG. 37(B). This is a method which compares a drain-to-source voltage (Vds (on)) of a synchronous rectification switch element (MOSFET) with a reference voltage REF in a comparator 510, detects that the synchronous rectification MOSFET, or a body diode thereof, is conductive and, provides a signal to the synchronous rectification MOSFET causing the synchronous rectification MOSFET to be turned on only for a period that the conductivity is detected and a gate signal Vgp is high (H). That is, the method generates a comparison signal Vdsc, which is an output of the comparator 510, in an AND circuit 430, and an AND signal of the gate signal Vgp of the primary side main switch elements Qa, Qb, and outputs them as synchronous drive signals Vgs (that is, Vgs1 and Vgs2), of which the waveform has been formed, to the MOSFETs Qs1 and Qs2, which are the switch elements.
Generally, the drain-to-source voltage Vds of the MOSFET, in a condition in which the MOSFET is turned off and a current is flowing in the body diode, becomes a body diode forward drop voltage VF (to be precise, taking a source potential as a reference potential, it is −VF). Meanwhile, in a condition in which the MOSFET is turned on, the drain-to-source voltage is a product of the on resistance of the MOSFET and the current flowing, and a value (an absolute value) thereof is normally smaller than VF. The reference voltage REF firstly, detecting that a current is flowing in the body diode, allows the MOSFET to be turned on, and subsequently, the MOSFET being turned on, in order that it is possible to cause the MOSFET to continue to be turned on even when the drain-to-source voltage Vds is small, the absolute value of the reference voltage REF is made considerably small (actually, taking noise and the like into consideration, it is necessary to make the absolute value large enough to be able to detect without error that the MOSFET, or the body diode thereof, is conductive).
However, as shown in FIG. 37(B), when the secondary current Is decreases to zero, how small the value of the reference voltage REF is, at some point the product of the on resistance of the MOSFET and the current flowing will become smaller. On this happening, a condition is such that the comparison signal Vdsc inverts, the MOSFET is turned off, and a current flows in the body diode, whereon the drain-to-source voltage Vds becomes −VF. Because of this, the comparison signal Vdsc inverts again, and the MOSFET is turned on again, as a result of which the comparison signal Vdsc further inverts. Subsequently, as shown in the error area of FIG. 37(B), the turning on and off of the MOSFET is repeated at a high frequency until the secondary current Is is definitely zero. This resonance phenomenon becomes more noticeable as the load becomes lighter, and the secondary current Is decreases. As such, as a high frequency resonance is repeated every time the secondary current Is decreases to zero, the invention described in Patent Document 1 is a method having a problem from the point of view of noise and power conversion efficiency.
As an invention which takes into consideration a conducting voltage of the internal diode, and sets a turn on threshold value (VTH2), there is Patent Document 3. Herein, as a turn on timing of the synchronous drive signal is decided only by the conducting voltage of the internal diode, there is a problem in that a malfunction is liable to occur in the dead time set in the primary side gate signals Vga, Vgb. Also, as a threshold value (VTH1) which determines a turn off timing is a minute voltage value of around −20 mV, and what is more a negative value, there is a problem in that it is easily effected by noise, and the timing of the off operation is unstable.
Also, with a different switching power source device, the primary side resonant current is detected with a current transformer, the exciting current is detected with a secondary side auxiliary coil, and a resonant current detection signal is compared with an exciting current detection signal. A synchronous rectification signal is generated based on a signal detecting whether or not a comparison result signal, a power switching signal, and the resonant current detection signal exceed 0 A (for example, Patent Document 4).
With the technology of Patent Document 4, it is possible to solve the reverse flow problem in each non-consecutive mode but, as the on timing of the synchronous rectification MOSFETS is delayed in the operational modes (Modes 1 and 4) with the heavy load condition, the power efficiency decreases. Moreover, as the current transformer and auxiliary coil are used in the detection circuit, a circuit configuration becomes complex, and so on, it is difficult to design to an appropriate adjusted value, and it is not desirable from a point of view of cost either.
Furthermore, as a synchronous rectification circuit which may prevent the current from flowing in the reverse direction, and a power converter which attempts a reduction in power conversion loss, there is the invention described in Patent Document 5. This invention compares a synchronous rectification transistor source-to-drain voltage in a comparator circuit and, when detecting a reverse direction current, attempts to prevent it using a switching unit. Herein, although a timing in which the synchronous rectification transistor is turned off is decided, there is no mention of a timing in which it is turned on. Consequently, the invention is not effective as a measure for preventing the reverse flow of the current (Ranges B and D) in the second operational mode (Mode 2), third operational mode (Mode 3), fifth operational mode (Mode 5), and sixth operational mode (Mode 6).
As such, with the heretofore known switching power source devices, there is no drive circuit which reliably prevents the reverse flow of the secondary current to the primary side in all six of the operational modes (refer to FIG. 8). In particular, there has been a need to execute a simple synchronous rectification which prevents the current reverse flow in the light load condition, and also prevents a malfunction by stably detecting the synchronous rectification MOSFET drain-to-source voltage (Vds).
The invention has been made in view of such problems. Therefore, an object of the present invention is to provide a switching power source device, a switching power source control circuit, and a switching power source device control method which can prevent a reverse flow of a current in any operational mode, and further realize a stable synchronous rectification function.
Further objects and advantages of the invention will be apparent from the following description of the invention.